Guest Lecture: Correct by construction SoC design
Date: April 15, 2009 (Wednesday) at 10:15
Partha S Roop, Senior Lecturer at the Electrical & Computer Engineering University of Auckland, New Zealand, is giving a talk entitled "Correct by construction SoC design".
Abstract:
The automated design of SoCs from pre-selected IPs that may require different clocks is challenging due to the following issues. Firstly, protocol mismatches between IPs need to be resolved before the IPs are integrated. Secondly, the presence of multiple clocks makes the protocol conversion even more difficult. Thirdly, it is desirable that the resulting integration is correct-by-construction i.e, the resulting SoC satisfies given set of system-level properties. In this seminar we will present an approach based on tableau-based model checking to resolve protocol mismatches. We have extensively studied many SoC designs where the proposed technique has been applied. A contribution of the proposed framework is that it nicely generalizes many exiting approaches to protocol conversion by tackling control, data and clock mismatches using a single algorithm.
Biography:
Partha is a Senior Lecturer in the department of Electrical & Computer Engineering of the University of Auckland in New Zealand. His primary research interests are in embedded systems, synchronous languages and model checking. He is currently on sabbatical leave in Kiel University, Germany until July 2009.
Room: E:2116
Last modified Dec 9, 2011 12:57 pm by Mikael.Antic@cs.lth.se
0288