Doctoral Dissertation, Constraint-Driven Design Space Exploration for Memory-Dominated Embedded Systems

Date: June 16, 2004 (Wednesday) at 13:15

Radadoslaw Szymanek

Opponent: Prof. Nikil Dutt, Center for Embedded Computer Systems, University of California, USA.

Abstract

Today, embedded systems often consist of many different processing, communication, and memory units. This makes an embedded system a multiprocessor system. There are usually many possible multiprocessor architectures and therefore we need tool support for fast evaluation of numerous design alternatives. However, there is a lack of this type of tools which is partially caused by the inherent complexity of the design process. On the other hand, most designers do not have enough con dence to use and trust such tools, since the designer interaction with a tool is usually strongly limited.

The special concern in this work are memory constraints. This is motivated by the fact that memory is a dominant factor in current designs. The memory in uences the performance of embedded systems as well as their energy consumption. There are different types of optimizations which can improve memory utilization. Design space exploration can identify those designs which use memory system ef ciently.

This thesis presents a framework, based on constraint programming (CP), for design space exploration. CP suits this task perfectly, since it offers means to model and solve problems with heterogeneous constraints. This framework makes it possible to re ne a speci cation manually by a designer or automatically. The automatic re nement is done by adding constraints produced by specially designed exploration algorithms. In manual case, the designer decides the nature of the re nement constraints. Design space exploration framework provides an invaluable support. It helps to nd (near)optimal designs given optimization criterion. When multiobjective criteria is speci ed then it provides (near) Pareto-optimal designs.

This thesis shows that despite the complexity of architecture selection, task assignment, task scheduling, data assignment, and data access scheduling problems, the designer is not left unaided. The presented formulation using a constraint framework coupled with problem speci c search heuristics makes it possible to ef ciently prune a huge design space. The exploration space prunning helps to nd better designs within the same exploration time limit.

Room: LTH, E:1406

Last modified Dec 9, 2011 12:59 pm

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