INFO:sim:172 - Generating IP...
Resolving generics for 'bram'...
Applying external generics to 'bram'...
Delivering associated files for 'bram'...
Delivering EJava files for 'bram'...
Generating implementation netlist for 'bram'...
INFO:sim - Pre-processing HDL files for 'bram'...
Running synthesis for 'bram'
Running ngcbuild...
Writing VHO instantiation template for 'bram'...
Writing VHDL behavioral simulation model for 'bram'...
WARNING:sim - Overwriting existing file
   D:/workspace/xilinx/ise/bram_test/ipcore_dir/tmp/_cg/bram/doc/blk_mem_gen_v7_
   3_vinfo.html with file from view xilinx_documentation
Delivered 1 file into directory
D:/workspace/xilinx/ise/bram_test/ipcore_dir/tmp/_cg/bram
Generating ASY schematic symbol...
INFO:sim:949 - Finished generation of ASY schematic symbol.
Generating SYM schematic symbol for 'bram'...
Generating metadata file...
Generating ISE project file for 'bram'...
Generating ISE project...
XCO file found: bram.xco
XMDF file found: bram_xmdf.tcl
Adding D:/workspace/xilinx/ise/bram_test/ipcore_dir/tmp/_cg/bram.asy -view all
-origin_type imported
Adding D:/workspace/xilinx/ise/bram_test/ipcore_dir/tmp/_cg/bram.ngc -view all
-origin_type created
Checking file "D:/workspace/xilinx/ise/bram_test/ipcore_dir/tmp/_cg/bram.ngc"
for project device match ...
File "D:/workspace/xilinx/ise/bram_test/ipcore_dir/tmp/_cg/bram.ngc" device
information matches project device.
Adding D:/workspace/xilinx/ise/bram_test/ipcore_dir/tmp/_cg/bram.sym -view all
-origin_type imported
Adding D:/workspace/xilinx/ise/bram_test/ipcore_dir/tmp/_cg/bram.vhd -view all
-origin_type created
INFO:HDLCompiler:1061 - Parsing VHDL file
   "D:/workspace/xilinx/ise/bram_test/ipcore_dir/tmp/_cg/bram.vhd" into library
   work
INFO:ProjectMgmt - Parsing design hierarchy completed successfully.
Adding D:/workspace/xilinx/ise/bram_test/ipcore_dir/tmp/_cg/bram.vho -view all
-origin_type imported
INFO:TclTasksC:2116 - The automatic calculation of top has been turned-off.
   Please set the new top explicitly by running the "project set top" command.
   To re-calculate the new top automatically, set the "Auto Implementation Top"
   property to true.
Top level has been set to "/bram"
Generating README file...
Generating FLIST file...
INFO:sim:948 - Finished FLIST file generation.
Launching README viewer...
Moving files to output directory...
Finished moving files to output directory
Wrote CGP file for project 'bram'.
