Project Status (09/15/2011 - 23:17:22)
Project File: system.xmp Implementation State: Programming File Generated
Module Name: system
  • Errors:
No Errors
Product Version:EDK 12.2
  • Warnings:
66 Warnings (8 new)
 
XPS Reports [-]
Report NameGenerated ErrorsWarningsInfos
Platgen Log Fileon 14. sep 22:44:46 2011011 Warnings (0 new)25 Infos (0 new)
Libgen Log Fileon 14. sep 23:10:09 2011000
Simgen Log File    
BitInit Log Fileto 15. sep 23:17:22 20110016 Infos (0 new)
System Log Fileto 15. sep 23:17:22 2011   
 
XPS Synthesis Summary [-]
ReportGeneratedFlip Flops UsedLUTs UsedBRAMS UsedErrors
systemon 14. sep 22:45:16 201125593155160
clock_generator_0_wrapperon 14. sep 22:44:42 20114  0
xps_gpio_0_wrapperon 14. sep 22:42:37 20119758 0
mb_plb_wrapperon 14. sep 22:42:13 2011156435 0
proc_sys_reset_0_wrapperon 14. sep 22:21:29 20116751 0
mdm_0_wrapperon 14. sep 22:21:21 2011119147 0
xps_timer_0_wrapperon 14. sep 22:20:59 2011360380 0
micron_ram_wrapperon 14. sep 22:20:31 2011472384 0
rs232_port_wrapperon 14. sep 22:20:05 2011146135 0
switches_8bit_wrapperon 14. sep 22:19:41 201112570 0
push_buttons_3bit_wrapperon 14. sep 22:19:24 20119055 0
led_7segment_wrapperon 14. sep 22:19:07 201115584 0
leds_8bit_wrapperon 14. sep 22:18:49 201112570 0
lmb_bram_wrapperon 14. sep 22:18:33 2011  160
ilmb_cntlr_wrapperon 14. sep 22:18:26 201126 0
dlmb_cntlr_wrapperon 14. sep 22:18:19 201126 0
dlmb_wrapperon 14. sep 22:18:13 201111 0
ilmb_wrapperon 14. sep 22:18:06 201111 0
microblaze_0_wrapperon 14. sep 22:17:33 20119171426 0
 
Device Utilization Summary [-]
Logic UtilizationUsedAvailableUtilizationNote(s)
Number of Slice Flip Flops 1,948 17,344 11%  
Number of 4 input LUTs 2,601 17,344 14%  
Number of occupied Slices 2,234 8,672 25%  
    Number of Slices containing only related logic 2,234 2,234 100%  
    Number of Slices containing unrelated logic 0 2,234 0%  
Total Number of 4 input LUTs 2,682 17,344 15%  
    Number used as logic 2,168      
    Number used as a route-thru 81      
    Number used for Dual Port RAMs 256      
    Number used as Shift registers 177      
Number of bonded IOBs 62 250 24%  
    IOB Flip Flops 79      
Number of RAMB16s 16 28 57%  
Number of BUFGMUXs 2 24 8%  
Number of DCMs 1 8 12%  
Number of BSCANs 1 1 100%  
Number of MULT18X18SIOs 3 28 10%  
Average Fanout of Non-Clock Nets 3.54      
 
Performance Summary [-]
Final Timing Score: 0 (Setup: 0, Hold: 0, Component Switching Limit: 0) Pinout Data: Pinout Report
Routing Results: All Signals Completely Routed Clock Data: Clock Report
Timing Constraints: All Constraints Met    
 
Detailed Reports [-]
Report NameStatusGenerated ErrorsWarningsInfos
Translation ReportCurrenton 14. sep 23:05:59 2011058 Warnings (0 new)1 Info (1 new)
Map ReportCurrenton 14. sep 23:07:36 201103 Warnings (3 new)355 Infos (1 new)
Place and Route ReportCurrenton 14. sep 23:08:52 201102 Warnings (2 new)0
Post-PAR Static Timing ReportCurrenton 14. sep 23:09:06 2011004 Infos (4 new)
Bitgen ReportCurrenton 14. sep 23:09:40 201103 Warnings (3 new)0
 
Secondary Reports [-]
Report NameStatusGenerated
WebTalk Log FileCurrenton 14. sep 23:09:41 2011

Date Generated: 09/15/2011 - 23:17:23