Xilinx System Settings Report

System Settings

Environment Settings
Environment Variable | xst | ngdbuild | map | par

PATHEXT

.COM;
.EXE;
.BAT;
.CMD;
.VBS;
.VBE;
.JS;
.JSE;
.WSF;
.WSH;
.PSC1

.COM;
.EXE;
.BAT;
.CMD;
.VBS;
.VBE;
.JS;
.JSE;
.WSF;
.WSH;
.PSC1

.COM;
.EXE;
.BAT;
.CMD;
.VBS;
.VBE;
.JS;
.JSE;
.WSF;
.WSH;
.PSC1

.COM;
.EXE;
.BAT;
.CMD;
.VBS;
.VBE;
.JS;
.JSE;
.WSF;
.WSH;
.PSC1

Path

C:\Xilinx\12.2\ISE_DS\ISE\\lib\nt;
C:\Xilinx\12.2\ISE_DS\ISE\\bin\nt;
C:\Xilinx\12.2\ISE_DS\PlanAhead\bin;
C:\Xilinx\12.2\ISE_DS\ISE\bin\nt;
C:\Xilinx\12.2\ISE_DS\ISE\lib\nt;
C:\Xilinx\12.2\ISE_DS\EDK\bin\nt;
C:\Xilinx\12.2\ISE_DS\EDK\lib\nt;
C:\Xilinx\12.2\ISE_DS\common\bin\nt;
C:\Xilinx\12.2\ISE_DS\common\lib\nt;
C:\Program Files\Autodesk\Alias2010\bin;
C:\WINDOWS\system32;
C:\WINDOWS;
C:\WINDOWS\system32\Wbem;
C:\Program Files\Common Files\Adobe\AGL;
C:\Program Files\QuickTime\QTSystem\C:\Program Files\proeWildfire 5.0\bin;
C:\WINDOWS\system32\WindowsPowerShell\v1.0;
C:\Program Files\Rayfront\platform\win32\bin;
C:\Program Files\Matlab\R2010a\bin\;
C:\Program Files\Microsoft Visual Studio 10.0\Vc\bin;
C:\Program Files\Microsoft SDKs\Windows\v7.0A\bin;
C:\Program Files\Microsoft Visual Studio 10.0\Common7\IDE;
C:\Program Files\QuickTime\QTSystem\

C:\Xilinx\12.2\ISE_DS\ISE\\lib\nt;
C:\Xilinx\12.2\ISE_DS\ISE\\bin\nt;
C:\Xilinx\12.2\ISE_DS\PlanAhead\bin;
C:\Xilinx\12.2\ISE_DS\ISE\bin\nt;
C:\Xilinx\12.2\ISE_DS\ISE\lib\nt;
C:\Xilinx\12.2\ISE_DS\EDK\bin\nt;
C:\Xilinx\12.2\ISE_DS\EDK\lib\nt;
C:\Xilinx\12.2\ISE_DS\common\bin\nt;
C:\Xilinx\12.2\ISE_DS\common\lib\nt;
C:\Program Files\Autodesk\Alias2010\bin;
C:\WINDOWS\system32;
C:\WINDOWS;
C:\WINDOWS\system32\Wbem;
C:\Program Files\Common Files\Adobe\AGL;
C:\Program Files\QuickTime\QTSystem\C:\Program Files\proeWildfire 5.0\bin;
C:\WINDOWS\system32\WindowsPowerShell\v1.0;
C:\Program Files\Rayfront\platform\win32\bin;
C:\Program Files\Matlab\R2010a\bin\;
C:\Program Files\Microsoft Visual Studio 10.0\Vc\bin;
C:\Program Files\Microsoft SDKs\Windows\v7.0A\bin;
C:\Program Files\Microsoft Visual Studio 10.0\Common7\IDE;
C:\Program Files\QuickTime\QTSystem\

C:\Xilinx\12.2\ISE_DS\ISE\\lib\nt;
C:\Xilinx\12.2\ISE_DS\ISE\\bin\nt;
C:\Xilinx\12.2\ISE_DS\PlanAhead\bin;
C:\Xilinx\12.2\ISE_DS\ISE\bin\nt;
C:\Xilinx\12.2\ISE_DS\ISE\lib\nt;
C:\Xilinx\12.2\ISE_DS\EDK\bin\nt;
C:\Xilinx\12.2\ISE_DS\EDK\lib\nt;
C:\Xilinx\12.2\ISE_DS\common\bin\nt;
C:\Xilinx\12.2\ISE_DS\common\lib\nt;
C:\Program Files\Autodesk\Alias2010\bin;
C:\WINDOWS\system32;
C:\WINDOWS;
C:\WINDOWS\system32\Wbem;
C:\Program Files\Common Files\Adobe\AGL;
C:\Program Files\QuickTime\QTSystem\C:\Program Files\proeWildfire 5.0\bin;
C:\WINDOWS\system32\WindowsPowerShell\v1.0;
C:\Program Files\Rayfront\platform\win32\bin;
C:\Program Files\Matlab\R2010a\bin\;
C:\Program Files\Microsoft Visual Studio 10.0\Vc\bin;
C:\Program Files\Microsoft SDKs\Windows\v7.0A\bin;
C:\Program Files\Microsoft Visual Studio 10.0\Common7\IDE;
C:\Program Files\QuickTime\QTSystem\

C:\Xilinx\12.2\ISE_DS\ISE\\lib\nt;
C:\Xilinx\12.2\ISE_DS\ISE\\bin\nt;
C:\Xilinx\12.2\ISE_DS\PlanAhead\bin;
C:\Xilinx\12.2\ISE_DS\ISE\bin\nt;
C:\Xilinx\12.2\ISE_DS\ISE\lib\nt;
C:\Xilinx\12.2\ISE_DS\EDK\bin\nt;
C:\Xilinx\12.2\ISE_DS\EDK\lib\nt;
C:\Xilinx\12.2\ISE_DS\common\bin\nt;
C:\Xilinx\12.2\ISE_DS\common\lib\nt;
C:\Program Files\Autodesk\Alias2010\bin;
C:\WINDOWS\system32;
C:\WINDOWS;
C:\WINDOWS\system32\Wbem;
C:\Program Files\Common Files\Adobe\AGL;
C:\Program Files\QuickTime\QTSystem\C:\Program Files\proeWildfire 5.0\bin;
C:\WINDOWS\system32\WindowsPowerShell\v1.0;
C:\Program Files\Rayfront\platform\win32\bin;
C:\Program Files\Matlab\R2010a\bin\;
C:\Program Files\Microsoft Visual Studio 10.0\Vc\bin;
C:\Program Files\Microsoft SDKs\Windows\v7.0A\bin;
C:\Program Files\Microsoft Visual Studio 10.0\Common7\IDE;
C:\Program Files\QuickTime\QTSystem\

XILINX | C:\Xilinx\12.2\ISE_DS\ISE\ | C:\Xilinx\12.2\ISE_DS\ISE\ | C:\Xilinx\12.2\ISE_DS\ISE\ | C:\Xilinx\12.2\ISE_DS\ISE\
XILINXD_LICENSE_FILE | 2100@vm05.cs.lth.se | 2100@vm05.cs.lth.se | 2100@vm05.cs.lth.se | 2100@vm05.cs.lth.se
XILINX_DSP | C:\Xilinx\12.2\ISE_DS\ISE | C:\Xilinx\12.2\ISE_DS\ISE | C:\Xilinx\12.2\ISE_DS\ISE | C:\Xilinx\12.2\ISE_DS\ISE
XILINX_EDK | C:\Xilinx\12.2\ISE_DS\EDK | C:\Xilinx\12.2\ISE_DS\EDK | C:\Xilinx\12.2\ISE_DS\EDK | C:\Xilinx\12.2\ISE_DS\EDK
XILINX_PLANAHEAD | C:\Xilinx\12.2\ISE_DS\PlanAhead | C:\Xilinx\12.2\ISE_DS\PlanAhead | C:\Xilinx\12.2\ISE_DS\PlanAhead | C:\Xilinx\12.2\ISE_DS\PlanAhead

Synthesis Property Settings
Switch Name | Property Name | Value | Default Value
-ifn |  | top.prj |
-ifmt |  | mixed | MIXED
-ofn |  | top |
-ofmt |  | NGC | NGC
-p |  | xc3s1200e-4-fg320 |
-top |  | top |
-opt_mode | Optimization Goal | Speed | Speed
-opt_level | Optimization Effort | 1 | 1
-iuc | Use synthesis Constraints File | NO | NO
-keep_hierarchy | Keep Hierarchy | No | NO
-netlist_hierarchy | Netlist Hierarchy | As_Optimized | As_Optimized
-rtlview | Generate RTL Schematic | Yes | NO
-glob_opt | Global Optimization Goal | AllClockNets | AllClockNets
-read_cores | Read Cores | YES | YES
-write_timing_constraints | Write Timing Constraints | NO | NO
-cross_clock_analysis | Cross Clock Analysis | NO | NO
-bus_delimiter | Bus Delimiter | <> | <>
-slice_utilization_ratio | Slice Utilization Ratio | 100 | 100%
-bram_utilization_ratio | BRAM Utilization Ratio | 100 | 100%
-verilog2001 | Verilog 2001 | YES | YES
-fsm_extract |  | YES | YES
-fsm_encoding |  | Auto | AUTO
-safe_implementation |  | No | NO
-fsm_style |  | LUT | LUT
-ram_extract |  | Yes | YES
-ram_style |  | Auto | AUTO
-rom_extract |  | Yes | YES
-shreg_extract |  | YES | YES
-rom_style |  | Auto | AUTO
-auto_bram_packing |  | NO | NO
-resource_sharing |  | YES | YES
-async_to_sync |  | NO | NO
-mult_style |  | Auto | AUTO
-iobuf |  | YES | YES
-max_fanout |  | 500 | 500
-bufg |  | 24 | 24
-register_duplication |  | YES | YES
-register_balancing |  | No | NO
-optimize_primitives |  | NO | NO
-use_clock_enable |  | Yes | YES
-use_sync_set |  | Yes | YES
-use_sync_reset |  | Yes | YES
-iob |  | Auto | AUTO
-equivalent_register_removal |  | YES | YES
-slice_utilization_ratio_maxmargin |  | 5 | 0%

Translation Property Settings
Switch Name | Property Name | Value | Default Value
-bm |  | edkBmmFile.bmm | None
-intstyle |  | ise | None
-dd |  | _ngo | None
-p |  | xc3s1200e-fg320-4 | None
-sd | Macro Search Path | ../Bomberman/implementation | None
-uc |  | top.ucf | None

Map Property Settings
Switch Name | Property Name | Value | Default Value
-ir | Use RLOC Constraints | OFF | OFF
-cm | Optimization Strategy (Cover Mode) | area | area
-intstyle |  | ise | None
-o |  | top_map.ncd | None
-pr | Pack I/O Registers/Latches into IOBs | off | off
-p |  | xc3s1200e-fg320-4 | None

Place and Route Property Settings
Switch Name | Property Name | Value | Default Value
-t |  | 1 | 1
-intstyle |  | ise |
-ol | Place & Route Effort Level (Overall) | high | std
-w |  | true | false

Operating System Information
Operating System Information | xst | ngdbuild | map | par
CPU Architecture/Speed | AMD Athlon(tm) 64 X2 Dual Core Processor 4000+/2094 MHz | AMD Athlon(tm) 64 X2 Dual Core Processor 4000+/2094 MHz | AMD Athlon(tm) 64 X2 Dual Core Processor 4000+/2094 MHz | AMD Athlon(tm) 64 X2 Dual Core Processor 4000+/2094 MHz
Host | neptunus-6 | neptunus-6 | neptunus-6 | neptunus-6
OS Name | Microsoft Windows XP Professional | Microsoft Windows XP Professional | Microsoft Windows XP Professional | Microsoft Windows XP Professional
OS Release | Service Pack 3 (build 2600) | Service Pack 3 (build 2600) | Service Pack 3 (build 2600) | Service Pack 3 (build 2600)